GXA9511

1 Features 
• Support 2.7V-5.5V power supply 
• Supports bidirectional data transfer of I²C bus signals 
• Compatible with I²C-bus Standard-mode, I²C-bus Fast-mode, and SMBus standards 
• 1-V Pre-charge on all SDA and SCL lines prevents 
• Built-in ∆V/∆t rise time accelerators on all SDA and SCL lines (0.6 V threshold) requires the bus pull-up voltage and supply voltage (VCC) to be the same 
• Supports clock frequencies up to 400kHz 
• Powered-off high-impedance I²C pins 
• Supports clock stretching, arbitration and synchronization 
• ESD protection exceeds 8000 V HBM per JESD22-A114 and 1200 V CDM per JESD22-C101 
• Package Information： 

2 Applications 
• Servers 
• Industrial control 
• Base stations 
• Enterprise Switching 

3 Description 
The GXA9511 is a hot swappable I²C-bus and SMBus buffer that allows I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the GXA9511 provides bidirectional buffering, keeping the backplane and card capacitances isolated. During insertion, the GXA9511 SDA and SCL lines are pre-charged to 1 V to minimize the current required to charge the parasitic capacitance of the chip. 
The GXA9511 rise time accelerator circuitry allows the use of weaker DC pull-up currents while still meeting rise time requirements. The GXA9511 incorporates a digital ENABLE input pin, which enables the device when asserted HIGH and forces the device into a low current mode when asserted LOW, and an open-drain READY output pin, which indicates that the backplane and card sides are connected together (HIGH) or not (LOW).

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